The technology relates to a drive circuit that performs gray-scale display with pulse width modulation (PWM), and to a display having the drive circuit. The technology also relates to a method of driving the display.
When a case of five bits (32-level gray scale) is taken as an example, a gray-scale display method as illustrated in FIG. 22 according to a comparative example, for instance, is used in a digital-driving display that performs gray-scale display with PWM. Specifically, as illustrated in FIG. 22, five pieces of data in a 1:2:4:8:16 period ratio are prepared using data of one bit with a width of a few milliseconds as a unit, for instance. The 32-level gray scale is expressed by a combination of these five pieces of data.
Part (A) to Part (D) of FIG. 23 illustrate a relationship between signal data in sequential scanning and selection pulses applied to scanning lines, in typical digital driving according to a comparative example. Here, a case of using three scanning lines is illustrated for the sake of description. As apparent from Part (A) to Part (D) of FIG. 23, in a display of typical digital driving, one frame period (1F) is divided into subfields SF1 to SF5 corresponding to the respective bits (in this case, a first bit to a fifth bit) of gray-scale data. The subfields SF1 to SF5 are periods each depending on the weight of the corresponding bit. The ratio of an ON period or an OFF period to the 1F is controlled stepwise, by turning an electro-optical device of a pixel on or off in accordance with the bit corresponding to each of the subfields SF1 to SF5. Writing data to the pixel through the scanning line is performed in line-sequential scanning, for each of the subfields SF1 to SF5. It is to be noted that information about the digital driving is described in, for example, Japanese Unexamined Patent Application Publication No. 2006-343609.